TXCHFR=Val_0x0
Transmit FIFO Flush Register 0
TXCHFR | Transmit Channel FIFO Reset. Writing a 0x1 to this bit flushes the channel TX FIFO (this is a self clearing bit). The TX channel or block must be disabled prior to writing to this bit. 0 (Val_0x0): Do not flushes the channel TX FIFO 1 (Val_0x1): Flushes the channel TX FIFO |